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| CXG1111EN 800MHz Band Receive Mixer Description The CXG1111EN is a mixer MMIC for the Japan CDMA cellular. This IC is designed using the Sony's GaAs J-FET process. Features * High conversion gain: Gc = 13.0dB (Typ.) * Low noise figure: NF = 4.5dB (Typ.) * Low distortion: IIP3 = +2.5dBm (Typ.) * Small package: 10-pin VSON Applications J-CDMA, PDC 800MHz and others RFIN 6 7 8 9 5 4 3 2 1 NC GND GND VDD1 (LO AMP) IFOUT/VDD2 (MIX) 10 pin VSON (Plastic) Pin Configuration Structure GaAs J-FET MMIC Absolute Maximum Ratings (Ta = 25C) * Supply voltage VDD 4.5 * Input power PIN +5 * Operating temperature Topr -35 to +85 * Storage temperature Tstg -65 to +150 Recommended Operating Condition Supply voltage VDD 2.7 to 3.3 GND OPT GND V dBm C C LOIN 10 V Block Diagram RFIN 6 LOIN 10 1 IFOUT Note on handling GaAs MMICs are ESD sensitive devices. Special handling precautions are required. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. -1- E00925A1Y-PS CXG1111EN Electrical Characteristics Conditions: VDD = 2.7V, fRF = 850MHz, fLO = 740MHz, PLO = -10dBm (Ta = 25C) Item Current consumption Conversion gain Noise figure Input IP3 LO - RF leak level Symbol IDD GC NF IIP3 PLK Min. -- 11.5 -- 0.5 -- Typ. 7.5 13 4.5 2.5 -20 Max. 10 14.5 6 -- -17 Unit mA dB dB dBm dBm Condition When no signal When a small signal 1 -- 1 Conversion from the IM3 suppression ratio for two-wave input: fRF = 850MHz/850.9MHz and PRF = -25dBm. Recommended Evaluation Circuit RFIN L1 L2 L3 6 7 8 R1 5 4 3 VDD (LO AMP) 9 10 L4 L6 C3 L7 C5 VDD (MIX) C4 IFOUT 2 L5 1 C1 C2 LOIN L1 L2 L3 L4 L5 18nH 22nH 27nH 33nH 33nH L6 L7 C1 C2 C3 220nH 220nH 100pF 1000pF 8pF C4 C5 R1 1000pF 1000pF 27 -2- CXG1111EN Example of Representative Characteristics (Ta = 25C) Mixer Block Gc, NF vs. fRF 14 Gc 13 8 13 Gc 8 9 14 Gc, NF vs. PLO 9 12 Gc [dB] 7 NF [dB] Gc [dB] 12 VDD = 2.7V fRF = 850MHz fLO = 740MHz NF 7 NF [dB] PLK [dBm] 11 VDD = 2.7V fLO = fRF - 110MHz PLO = -10dBm NF 6 11 6 10 5 10 5 9 4 9 4 3 8 800 810 820 830 840 850 860 870 880 890 900 fRF [MHz] 8 -25 3 -20 -15 -10 -5 0 PLO [dBm] POUT, IM3 vs. PIN 30 20 5 10 0 POUT POUT [dBm] IIP3 [dBm] IIP3, PLK vs. PLO 6 -15 -17.5 -20 PLK 3 2 IIP3 1 0 -1 -2 -25 VDD = 2.7V fRF = 850MHz fRF2 = 850.9MHz fLO = 740MHz PLO = -10dBm -20 -15 -10 -5 0 -27.5 -30 -32.5 -35 PLO [dBm] -22.5 -25 4 -10 -20 -30 -40 IM3 -50 -60 -70 -80 -40 -30 -20 -10 0 10 VDD = 2.7V fRF = 850MHz fRF2 = 850.9MHz fLO = 740MHz PLO = -10dBm PIN [dBm] -3- CXG1111EN Example of Representative Characteristics for Option Resistance R1 Changed (Ta = 25C) IMIX vs. R1 10 9 8 7 VDD = 2.7V (no signal) 14 GC, NF vs. R1 9 13 GC 12 VDD = 2.7V fRF = 850MHz fLO = 740MHz PLO = -10dBm 8 7 IMIX [mA] 5 4 3 2 1 0 OPEN 200 100 47 39 R1 [] 33 27 22 18 11 6 10 NF 9 8 OPEN 200 100 5 4 3 47 39 R1 [] 33 27 22 18 IIP3, PLK vs. PLO 6 5 4 PLK -15 -17.5 -20 IIP3 [dBm] 2 1 0 -1 -2 OPEN 200 100 -25 IIP3 -27.5 VDD = 2.7V fRF1 = 850MHz fRF2 = 850.9MHz fLO = 740MHz PLO = -10dBm 47 39 R1 [] 33 27 22 18 -30 -32.5 -35 -4- PLK [dBm] 3 -22.5 NF [dB] GC [dB] 6 CXG1111EN Recommended Evaluation Board Front 25mm RFIN 50mm LOIN IFOUT VDD1 GND VDD2 Glass fabric-base 4-layer epoxy board (thickness: 0.2mm x 2) GND for the whole 2nd and 3rd layers Enlarged Diagram of Center Part L1 L2 L3 R1 L5 C1 C3 L6 C2 L4 L7 C4 C5 -5- CXG1111EN Package Outline Unit: mm 10PIN VSON(PLASTIC) + 0.1 0.8 - 0.05 0.6 2.5 A 10 6 S 0.35 0.1 2.5 0.05 S PIN 1 INDEX 1 0.4 5 B x4 0.15 S A B 0.2 0.01 0.225 0.03 x2 0.15 S B 0.35 0.1 0.8 0.05 M S AB 0.03 0.03 (Stand Off) Solder Plating 0.13 0.025 + 0.09 0.14 - 0.03 TERMINAL SECTION PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE VSON-10P-01 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY 0.013g Kokubu Ass'y 10PIN VSON(PLASTIC) + 0.1 0.8 - 0.05 0.6 2.5 A 10 6 S 0.35 0.1 2.5 0.05 S 0.5 0.2 0.5 0.2 2.7 PIN 1 INDEX 1 0.4 5 B x4 0.15 S A B 0.2 0.01 0.013g 2.7 x2 0.15 S B 0.35 0.1 0.8 0.05 M S AB 0.03 0.03 (Stand Off) Solder Plating 0.13 0.025 + 0.09 0.14 - 0.03 TERMINAL SECTION PACKAGE STRUCTURE PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE VSON-10P-01 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER PLATING COPPER ALLOY LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SOLDER COMPOSITION PLATING THICKNESS SPEC. COPPER ALLOY Sn-Bi Bi:1-4wt% 5-18m 0.225 0.03 -6- Sony Corporation |
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